1. Field of the Invention
The present invention relates to a semiconductor device which prevents a breakdown due to overvoltage such as electrostatic discharge (hereinafter, referred to as ESD), and a method of manufacturing the same.
2. Description of the Related Art
As a structural embodiment of a conventional semiconductor device, MOS transistor 31 described below is known.
As shown in FIG. 8, N type epitaxial layer 33 is formed on P type semiconductor substrate 32. In the epitaxial layer 33, P type diffusion layers 34 and 35 are formed as a backgate region. In the P type diffusion layer 34, N type diffusion layer 36 is formed as a source region. In the epitaxial layer 33, N type diffusion layers 37 and 38 are formed as a drain region. On the epitaxial layer 33, gate oxide film 39, gate electrode 40 and insulating layer 41 are formed (for example, see Japanese Patent Application Publication No. 2003-303961 (pages 3 and 4, FIGS. 1 and 2)).
The MOS transistor 31 includes parasitic transistor Tr2 (hereinafter, referred to as parasite Tr2) formed of the N type diffusion layers 37 and 38 (including the epitaxial layer 33), P type diffusion layers 34 and 35, and N type diffusion layer 36. When a positive ESD surge, for example, is applied to drain electrode 42 of the MOS transistor 31, on-current I2 of the parasite Tr2 occurs as shown in a dotted line in FIG. 8, and the parasite Tr2 is thus turned on. At this time, the on-current I2 of the parasite Tr2 flowing from the drain electrode 42 flows through a portion in the epitaxial layer 33 near its top surface (called the top surface portion of the epitaxial layer 33 below) having small resistance value. Accordingly, the on-current I2 of the parasite Tr2 is concentrated in a region indicated by circle 43 of FIG. 8. Since the gate oxide film 39, the insulating film 41, and the like which are inferior in heat radiating property compared to silicon are disposed on the epitaxial layer 33, the top surface portion of the epitaxial layer 33 is a region poor in heat radiation property. Accordingly, in the region represented by the circle 43, heat is generated by the on-current I2 of the parasite Tr2, leading to a problem that a breakdown occurs at the top surface portion of the epitaxial layer 33. For example, when an electrostatic breakdown experiment was performed on the MOS transistor 31 having a structure with a gate length (W) of 1000 μm, the above described heat breakdown occurred with the on-current I2 of the parasite Tr2 of 1 A or smaller. The MOS transistor 31 having the above structure had an ESD withstand voltage of 200V or smaller in a machine model (MM) and an ESD withstand voltage of 1000V or smaller in a human body model (HBM). Accordingly, a desired ESD robustness cannot be achieved in this structure.